1.1. THE NEED FOR HIGH-LEVEL DESCRIPTIONS
1.2. LEVELS AND DOMAINS OF DESCRIPTION

2.1. INTRODUCTION
2.2. MODEL CLASSIFICATION
2.3. STATE-ORIENTED MODELS

2.3.1. Finite-State Machines
2.3.2. Petri Nets
2.3.3. Hierarchical Concurrent Finite-State Machines

2.4. ACTIVITY-ORIENTED MODELS

2.4.1. Data-Flow Graphs
2.4.2. Control-Flow Graphs

2.5. STRUCTURE-ORIENTED MODELS

2.5.1. Component-Connectivity Diagrams
2.5.2. Incidence Structures
2.5.3. Logic Networks

2.6. HETEROGENEOUS MODELS

2.6.1. Control and Data-Flow Graphs
2.6.2. Structure Diagrams
2.6.3. Program-State Machines
2.6.4. Queuing Model

3.1. INTRODUCTION
3.2. TYPES OF HARDWARE DESCRIPTION LANGUAGES

3.2.1. Structural Description Languages
3.2.2. Behavioral Description Languages

3.3. HARDWARE DESCRIPTION LANGUAGE FEATURES

3.3.1. Programming Language Features

3.3.1.1. Data Types
3.3.1.2. Operators and Assignment Statements
3.3.1.3. Control Constructs
3.3.1.4. Execution Ordering

3.3.2. Hardware-Unit Specific Features

3.3.2.1. Interface Declarations
3.3.2.2. Structural Declarations
3.3.2.3. RT-Level and Logic Operators
3.3.2.4. Asynchrony
3.3.2.5. Hierarchy
3.3.2.6. Interprocess Communication
3.3.2.7. Constraints
3.3.2.8. User Allocation

3.4. HARDWARE DESCRIPTION LANGUAGE FORMATS

3.4.1. Textual Languages
3.4.2. Graphical Languages
3.4.3. Tabular Languages
3.4.4. Languages Based on Timing Diagrams

3.5. EXAMPLES OF DESCRIPTION LANGUAGES

3.5.1. VHDL
3.5.2. HardwareC
3.5.3. CSP
3.5.4. Verilog
3.5.5. Statecharts
3.5.6. Silage
3.5.7. SpecCharts

3.6. RELATIONSHIP BETWEEN LANGUAGE AND ARCHITECTURE