1.1. HIGH-LEVEL SYNTHESIS
1.2. HIGH-LEVEL SYNTHESIS STEPS

2.1. INTRODUCTION
2.2. DESIGN STEPS IN HIGH-LEVEL SYNTHESIS: AN EXAMPLE
2.3. COMPILATION OF DESCRIPTION LANGUAGES

2.3.1. Example of Generation for the Internal Representation
2.3.2. Compilation Techniques

2.4. REPRESENTATION OF HARDWARE DESCRIPTIONS

2.4.1. Control-Flow Representation
2.4.2. Representation of Sequencing and Timing
2.4.3. Disjoint Control and Data-Flow Representations
2.4.4. Hybrid Control and Data-Flow Representations
2.4.5. Syntactic-Tree Representations

2.5. REPRESENTATION OF HIGH-LEVEL SYNTHESIS OUTPUTS
2.6. TRANSFORMATIONS

2.6.1. Compiler Transformations
2.6.2. Graph Transformations
2.6.3. Hardware-Specific Transformations

3.1. INTRODUCTION
3.2. BASIC SCHEDULING ALGORITHMS
3.3. TIME-CONSTRAINED SCHEDULING

3.3.1. Linear Programming Method
3.3.2. Constructive Heuristic Method
3.3.3. Iterative Refinement Method

3.4. RESOURCE-CONSTRAINED SCHEDULING

3.4.1. List-Based Scheduling Method
3.4.2. Static-List Scheduling Method

3.5. SCHEDULING WITH RELAXED SIMPLIFYING ASSUMPTIONS

3.5.1. Functional Units with Varying Delays
3.5.2. Multi-Functional Units
3.5.3. Descriptions Using Conditional Constructs and Loops

4.1. INTRODUCTION
4.2. DATAPATH ARCHITECTURES
4.3. OPERATIONS FOR DATAPATH ALLOCATION

4.3.1. Unit Selection
4.3.2. Functional-Unit Assignment
4.3.3. Memory-Unit Assignment
4.3.4. Interconnection Assignment
4.3.5. Interdependence of Operations

4.4. GREEDY CONSTRUCTIVE METHODS
4.5. DECOMPOSITION METHOD
4.6. ITERATIVE REFINEMENT METHOD