Structure of Computer Systems
Projects (2011/2012)
Guide for Writing the Project Report
Guide-Project.pdf
No. |
Subject |
Description |
1 | Floating-point unit: addition and subtraction |
• Number representation conforming to the IEEE 754 standard • Microprogrammed implementation |
2 | Floating-point unit: multiplication |
• Number representation conforming to the IEEE 754 standard • Microprogrammed implementation |
3 | Floating-point unit: division |
• Number representation conforming to the IEEE 754 standard • Microprogrammed implementation |
4 | Floating-point unit: addition and subtraction |
• Number representation conforming to the IEEE 754 standard • Structural design in VHDL |
5 | Floating-point unit: multiplication |
• Number representation conforming to the IEEE 754 standard • Structural design in VHDL |
6 | Floating-point unit: division |
• Number representation conforming to the IEEE 754 standard • Structural design in VHDL |
7 | Adders for integer numbers |
• 32-bit numbers • Various addition techniques, including pipelined adders • Structural design in VHDL |
8 | Pipelined multipliers for integer numbers |
• 16-bit numbers • Various multiplication techniques: Booth, Wallace-tree, etc. • Structural design in VHDL |
9 | Division circuits for integer numbers |
• 16-bit numbers • Various division techniques • Structural design in VHDL |
10 | Decimal multipliers |
• 8-digit numbers • Various multiplication techniques • Structural design in VHDL |
11 | Decimal dividers |
• 8-digit numbers • Various division techniques • Structural design in VHDL |
12 | Radix-4 division circuit for integer numbers |
• 16-bit numbers • Design in VHDL |
13 | The RTPC computer |
• Simulation of the functional VHDL model • Design and test of the structural model • Implementation on an FPGA board |
14 | The DLX RISC computer |
• Simulation of the functional VHDL model • Design and test of the structural model • Implementation on an FPGA board |
15 | The DLX simulator extended with the scoreboarding technique |
• Implementation in C++ |
16 | The DLX simulator extended with Tomasulo's algorithm |
• Implementation in C++ |
17 | Simple microcomputer |
• Structural design in VHDL • Implementation on an FPGA board |
18 | Cache memory controller |
• "Write-through" and "write-back" management • Structural design in VHDL |
19 | Cache memory controller |
• "Write-through" and "write-back" management • Design using schematics |
20 | Configurable processor |
• 16-bit data and address buses • Load/store architecture • Custom instructions and functional blocks • Structural design in VHDL • Implementation in an FPGA board |
21 | RISC computer | • Structural design in VHDL |
22 | Hardware implementation of CORDIC (COordinate Rotation DIgital Computer) algorithms |
• Design in VHDL based on the source code in C • Implementation on an FPGA board |
23 | Hardware implementation of DSP algorithms using distributed arithmetic |
• Design in VHDL • Forward and inverse DCT (Discrete Cosine Transform) • Wavelet transforms • Implementation on an FPGA board |
24 | Hardware implementation of image processing algorithms using distributed arithmetic |
• Design in VHDL • Convolution • Correlation • Filtering • Implementation on an FPGA board |
25 | Hardware implementation of image processing algorithms using systolic arrays |
• Design in VHDL • Implementation on an FPGA board |
26 | Implementation of the 4-bit AM2901 microprocessor slice |
• Structural design in VHDL • Implementation on an FPGA board |
27 | Controller for the Modbus protocol |
• Design in VHDL • Implementation on an FPGA board • Application program on the computer |
28 | Reconfigurable processor |
• 16-bit data and address buses • Load/store architecture • Design in VHDL • Implementation on an FPGA board |
29 | Partial reconfiguration of the Xilinx Virtex-II Pro device |
• Example application using the module-based flow |
30 | Communication between the computer and the Xess XSA-50 board through the parallel port |
• Communication protocol designed in VHDL • Implementation on the XSA-50 board • Application program on the computer |
31 | Communication between the computer and the Digilent Pegasus board through the network |
• Design in VHDL • Implementation on the Digilent Pegasus board using the NET1 module • Application program on the computer for transferring graphic files |
32 | Controller for the PS/2 interface of the Digilent Pegasus board |
• Design in VHDL • Bidirectional communication with the keyboard • Communication with the mouse • Implementation on the Digilent Pegasus board |
33 | Communication between the computer and the XSA-50/XStend boards through the serial port |
• Serial controller designed in VHDL • Implementation on the XSA-50/XStend boards • Application program on the computer |
34 | Audio playback on the XUP Virtex-II Pro board |
• The audio data are read from a file and written into the SDRAM of the board • The audio data are played back from the SDRAM of the board • Design in VHDL • Application program on the computer |
35 | Audio filters implemented on the XUP Virtex-II Pro board |
• The audio data are read from an audio source and written into the SDRAM of the board • The filters perform various audio effects • The original and filtered audio data are played back from the SDRAM of the board • Implementation using Xilinx EDK |
36 | Partial reconfiguration of FPGA devices |
• Design example in VHDL for image processing • Implementation on the Spartan-3 board |
37 | Partial reconfiguration of FPGA devices |
• Design example in VHDL for a simple processor • Implementation on the Spartan-3 board |
38 | Simple microcontroller implemented on the Digilent Spartan-3 board |
• General-purpose instructions • Special instructions to control the Digilent Spartan-3 board's resources • Structural design in VHDL |
39 | Simple microcontroller implemented on the Digilent Spartan-3E board |
• General-purpose instructions • Special instructions to control the Digilent Spartan-3E board's resources • Structural design in VHDL |
40 | Assembler for a simple microcontroller | • Implementation in C++ |
41 | Extension of the PicoBlaze microcontroller with special instructions for image processing |
• Special instructions implemented in separate hardware modules connected to PicoBlaze • Design in VHDL |
42 | Extension of the PicoBlaze microcontroller with special instructions for the Digilent Spartan-3 board |
• Special instructions implemented in separate hardware modules connected to PicoBlaze • Design in VHDL • Implementation on the Spartan-3 board |
43 | Extension of the PicoBlaze microcontroller with special instructions for the Digilent Spartan-3E board |
• Special instructions implemented in separate hardware modules connected to PicoBlaze • Design in VHDL • Implementation on the Digilent Spartan-3E board |
44 | Scientific calculator implemented on the Digilent Spartan-3 board |
• PS/2 interface for the keyboard • Driver for the 7-segment display • Arithmetic operations • Implementation using Xilinx EDK |
45 | The DPC03 processor implemented on the Digilent Spartan-3 board |
• RISC architecture • Structural design in VHDL |
46 | Assembler for the DPC03 processor | • Implementation in C++ |
47 | Hardware implementation of the HTTP protocol |
• Design in VHDL • Implementation on the XUP Virtex-II Pro board |
48 | Communication with the Digilent boards using the DPCUTIL API |
• Application programs to illustrate the use of DPCUTIL functions • Implementation in C++ |
49 | Arithmetic-logic unit implemented on the Digilent Spartan-3 board |
• Basic arithmetic operations implemented with sequential and combinational circuits • Structural design in VHDL |
50 | Simple processor implemented on the Digilent Spartan-3 board |
• Structural design in VHDL • General-purpose and I/O instructions • Implementation on the Digilent Spartan-3 board • Simple assembler |
51 | Implementation of an 8051 microcontroller |
• Structural design in VHDL • Implementation on the Digilent Spartan-3 board |
52 | Hardware implementation of a Web server |
• Design in VHDL • Implementation of the HTTP protocol using an IP stack • Implementation on the XUP Virtex-II Pro board |
53 | Hardware implementation of an e-mail client |
• Design in VHDL • Implementation of the SMTP protocol using an IP stack • Implementation on the XUP Virtex-II Pro board |
54 | Implementation of an e-mail client |
• Design using Xilinx EDK • Implementation on the XUP Virtex-II Pro or Spartan-3E board |
55 | Implementation of an FTP server |
• Design using Xilinx EDK • Implementation on the XUP Virtex-II Pro or Spartan-3E board |
56 | Implementation of the Mic-2 microarchitecture |
• Structural design in VHDL • Implementation on an FPGA board |
57 | Using the Atmel 24XXX256 serial EEPROM |
• Communication via the I2C bus • Program in the 8051 C language for reading and writing the memory • Implementation on the CP-JR51USB board |
58 | Using the DS1307 real-time clock |
• Communication via the I2C bus • Program in the 8051 C language for setting and displaying the date and time • Implementation on the CP-JR51USB board |
59 | Using the DS1820 digital thermometer |
• Program in the 8051 assembly language for transmitting the temperature on the serial interface • Implementation on the CP-JR51USB board |
60 | Implementation of the Mic-3 microarchitecture |
• Pipelined datapath • Structural design in VHDL • Implementation on an FPGA board |
61 | Implementation of the Mic-4 microarchitecture |
• Pipelined datapath with seven stages • Structural design in VHDL • Implementation on an FPGA board |
62 | Implementation of the THUMB microprocessor |
• RISC architecture • Pipelined instruction execution • Prevention of hazards • Structural design in VHDL • Implementation on the Spartan-3 board |
63 | Implementation of the EMMA-2 processor |
• Microprogrammed architecture • Structural design in VHDL • Implementation on an FPGA board |
64 | Microassembler for the EMMA-2 processor |
• Implementation in C++ or C# |
65 | Implementation of the SIMD-2 array processor |
• Two-dimensional array processor • Structural design in VHDL • Implementation on an FPGA board |
66 | Implementation of the GR0040 processor |
• RISC architecture • Structural design in VHDL • Implementation on an FPGA board |
67 | Implementation of the LEON3 processor |
• SPARC V8 architecture • Based on an existing VHDL model • Implementation on the XUP Virtex-II Pro board |
68 | Keyboard and display modules for the uClinux OS |
• Extension of the uClinux implementation on the XUP Virtex-II Pro board for MicroBlaze • Module for PS/2 keyboard • Module for graphics display • Design using Xilinx EDK |
69 | Hardware implementation of the convolution function using systolic arrays |
• Design in VHDL • Implementation of digital filters for image processing • Implementation on an FPGA board |
70 | Communication between the computer and the Digilent Spartan-3 board through the serial interface |
• Design in VHDL • Application program on the computer |
71 | Extension of the PicoBlaze microcontroller with special instructions for the Digilent Spartan-3E board |
• Special instructions implemented in separate hardware modules connected to PicoBlaze • Design in VHDL • Implementation on the Spartan-3E board |
72 | Frequency counter |
• Design using the 8051 IP core • Communication with the computer through the serial interface • Implementation on the Spartan-3 board |
73 | Sound generator |
• Design in VHDL • Implementation on the Spartan-3E board using the SPKR1 module |
74 | Using the XCF0S serial flash memory |
• Design using an 8051 IP core • Read, write, erase, read ID operations • Implementation on the Spartan-3 board |
75 | Hardware implementation of Pulse Width Modulation |
• Design in VHDL • Implementation on an FPGA board |
76 | Software implementation of Pulse Width Modulation |
• Design using an 8051 IP core • Implementation on an FPGA board |
77 | Mouse interface |
• Design in VHDL • Implementation on the Spartan-3 board |
78 | Digital oscilloscope |
• Design in VHDL • Signals displayed on a VGA monitor • Implementation on the Spartan-3E board |
79 | Digital oscilloscope |
• Design in VHDL • Communication with the computer through the USB interface • Signals displayed on the computer screen • Implementation on the Spartan-3E board |
80 | Implementation of the uClinux OS |
• Design using Xilinx EDK • Implementation on the Spartan-3E board |
81 | Implementation of the MANIK processor |
• Based on an existing VHDL design • Integration of the available cores • Implementation on the Spartan-3 board |
82 | Implementation of the MANIK processor |
• Based on an existing VHDL design • Integration of the available cores • Implementation on the Spartan-3E board |
83 | True random number generator using the Trusted Platform Module |
• Research study • Application program on the computer |
84 | True random number generators using FPGAs |
• Research study • Implementation on a development board |
85 | Using the Intel StrataFlash memory |
• Design in VHDL • Erase, read, and write operations • Implementation on the Spartan-3E board |
86 | Using the M25P16 SPI serial flash memory |
• Design in VHDL • Erase, read, and write operations • Implementation on the Spartan-3E board |
87 | Serial bootloader for the AT89C5131 microcontroller |
• Program in the 8051 C language for programming the flash memory • Communication with the computer via the serial interface • Implementation on the CP-JR51USB board |
88 | Using the XCF0S serial flash memory |
• Design in VHDL • Read, write, erase, read ID operations • Implementation on the Spartan-3 board |
89 | Using the DS2432 protected EEPROM |
• Design in VHDL • Read and write operations • Implementation on the Spartan-3E board |
90 | Using the Spartan-3E board's LCD |
• Design in VHDL • Implementation on the Spartan-3E board |
91 | Rotary switch interface |
• Design in VHDL • Implementation on the Spartan-3E board |
92 | Connecting an LCD to the CP-JR ARM7 board |
• LCD02 display of 20x4 characters • Communication via the I2C bus • Programming in the C language • Implementation on the CP-JR ARM7 USB-LPC2148 board |
93 | Using the DS18S20 digital thermometer |
• Program in the C language for transmitting the temperature on the serial interface • Implementation on the CP-JR ARM7 USB-LPC2148 board |
Resources
Manuals for the XESS Boards (© X Engineering Software Systems Corp., 2001-2003)
-
XESS XSA Board User Manual
xsa-manual-v1_2.pdf
-
XESS XStend Board Manual
xst-manual-v2_1_0.pdf
-
XESS XS Board Utilities (XSTOOLs) User Manual
xstools-v4_0.pdf
-
XSTOOLs Software Source Documentation
xstools-src-doc-4_0.pdf
-
XSTOOLs Software Source Code
xstools-source-4_0.zip
-
XESS XSA Board Parallel Port Interface
an-111601-xsapport.pdf
-
XESS XSA Board Flash Memory Programming
an-111701-xsaflash.pdf
-
Xilinx Parallel Cable III Emulator for the XESS XSA Board
an-111801-xsapiii.pdf
-
XESS XSA Board SDRAM Controller
an-090502-sdramcntl.pdf
The DLX Computer
-
Source code for DLX simulator
DLXSIM.zip
-
A Neophyte's Guide to DLX
DLX-For-Neophytes.htm
-
The DLX Instruction Set, BYU Edition
DLX-Instruction-Set.htm
Digital Signal Processing (DSP)
-
Xilinx, Inc.: Technical Backgrounder, Xtreme DSP Initiative
dsp_grounder.pdf
-
Goslin, Gregory Ray: A Guide to Using Field Programmable Gate Arrays (FPGAs)
for Application-Specific Digital Signal Processing Performance, Xilinx, Inc., 1995
dspguide.pdf
-
Chapman, Ken: Building High Performance FIR Filters Using KCM’s, 1996
kcm_fir.pdf
-
Valls, Javier; Peiro, Marcos; Sansaloni, Trini; Boemo, Eduardo: A Study about FPGA-Based
Digital Filters, In Proceedings of IEEE Workshop on VLSI Signal Processing: Design and
Implementation, pp. 191-201, 1998
sips98-fir.pdf
-
Lyons, Richard: Quadrature Signals: Complex, But Not Complicated, 2000
QuadSignals.pdf
-
Texas Instruments, Inc.: TMS320C62x DSP Library Programmer’s Reference, 2002
spru402a.pdf
-
Fourier Transform Tutorial for DSP, www.spd.eee.strath.ac.uk/~interact/fourier/
FFT-Tutorial.pdf
Image Processing
-
Fisher, Bob; Perkins, Simon; Walker, Ashley and Wolfart, Erik: HiperMedia Image
Processing Reference, University of Edinburgh, 1994,
http://www.cee.hw.ac.uk/hipr/html/hipr_top.html
HIPR.zip (141 MHTML files)
-
Images for the HiperMedia Image Processing Reference
HIPR-images.zip (588 GIF files)
-
Young, David: Sussex Computer Vision Teach Files, University of Sussex, 1994,
http://www.cogs.susx.ac.uk/users/davidy/teachvision/vision0.html
Sussex-Computer-Vision.zip
-
Texas Instruments, Inc.: TMS320C62x Image/Video Processing Library Programmer’s
Reference, 2002
spru400a.pdf
-
Hoffmann, Gernot: Gaussian Filter, 2002, http://www.fho-emden.de/~hoffmann
gauss25092001.pdf
-
Smith, John: Implementing Median Filters in XC4000E FPGAs, Xcell Journal,
Issue 23, Q4, 1996
xl23_16.pdf
Distributed Arithmetic for DSP and Image Processing
-
The Role of Distributed Arithmetic in FPGA-based Signal Processing
theory1.pdf
-
Goslin, Gregory Ray: A Guide to Using Field Programmable Gate Arrays (FPGAs)
for Application-Specific Digital Signal Processing Performance, Xilinx, Inc., 1995
dspguide.pdf
-
Andraka, Ray; Berkun, Andrew: FPGAs Make a Radar Signal Processor on a Chip a Reality,
Proceedings of the Asilomar Conference on Signals, Systems, and Computers, IEEE, 1999
Radar-Signal-Processor.pdf
-
Andraka Consulting Group, Inc.: Distributed Arithmetic, 2002,
http://www.andraka.com/distribu.htm
The PicoBlaze Microcontroller (© Xilinx, Inc., 2002-2005)
-
PicoBlaze design files, assembler, and UART manual
xapp213.zip
-
Chapman, Ken: PicoBlaze 8-Bit Microcontroller for Virtex-E and Spartan-II/IIE Devices,
Xilinx Application Note XAPP213, 2003
xapp213.pdf
-
Xilinx, Inc.: PicoBlaze 8-Bit Embedded Microcontroller User Guide
for Spartan-3, Virtex-II, and Virtex-II Pro FPGAs, 2005
ug129.pdf
JTAG Boundary Scan
-
Xilinx, Inc.: ISP Standards & Specifications, 2003
ISP-Standards&Specifications.mht
-
Sun Microsystems: Introduction to JTAG Boundary Scan, White Paper, 1997,
http://www.sun.com/microelectronics/whitepapers/wpr-0018-01/
Boundary-Scan-Basics.mht
-
Jacobsson, Neil; Toth, Frank: The Java API for Boundary-Scan, ChipCenter-Questlink,
2002, http://www.chipcenter.com/
Java-API-Boundary-Scan.mht
-
Xilinx, Inc.: JTAG - General Description of the TAP Controller States, Xilinx Answer
Database, 2003
TAP-Controller-States.mht
-
Xilinx, Inc.: The Java API for Boundary Scan Frequently Asked Questions, 2003
Java-API-Boundary-Scan-FAQs.mht
-
Xilinx, Inc.: J Drive Engine, 2003
JDrive-Engine.mht
-
Xilinx, Inc.: Documentation for the Xilinx 1532 J Drive Programming Engine
Doc-1532-JDrive-Engine.zip (Word document file)
-
Java API for Boundary-Scan Strawman Protoype Code
jsproto.zip
-
Jacobson, Neil: Boundary-Scan Example
(Application example using the Java API Strawman prototype code)
Boundary-Scan-Example.zip
-
Kuramoto, Randal: J Drive: In-System Programming of IEEE Standard 1532 Devices,
Xilinx Application Note XAPP500, 2001
xapp500.pdf
-
Xilinx, Inc.: Xilinx BSDL Files, 2004
Xilinx-BSDL-Files.mht
-
Boundary Scan Description Language (BSDL) files for Xilinx Spartan 2 devices
xc2s.zip
Updated: February 25, 2015