1.1 I/O SYSTEMS
1.2 I/O SYSTEM STRUCTURE
1.3 I/O MODULES

1.3.1 I/O Module Function. 1.3.2 I/O Module Structure

1.4 CHAPTER SUMMARY
1.5 CONCEPTS AND KNOWLEDGE
REFERENCES
EXERCISES

2.1 PROGRAMMED I/O

2.1.1 Principle of Programmed I/O. 2.1.2 Device Addressing. 2.1.3 I/O Instructions. 2.1.4 Example: Programming Interface for a Keyboard. 2.1.5 Disadvantage of Programmed I/O

2.2 INTERRUPT-DRIVEN I/O

2.2.1 Principle of Interrupt-Driven I/O. 2.2.2 Multiple Interrupt Systems. 2.2.3 Priority Interrupt Systems: Parallel Priority Interrupts; Daisy-Chain Priority Interrupts. 2.2.4 Interrupt Service Routines

2.3 DIRECT MEMORY ACCESS

2.3.1 Principle of I/O through Direct Memory Access. 2.3.2 Execution of DMA Transfers. 2.3.3 Configurations of Systems Using DMA Transfers

2.4 I/O PROCESSORS

2.4.1 Principle of I/O through I/O Processors. 2.4.2 I/O Program Execution. 2.4.3 Intel I/O Processors

2.5 CHAPTER SUMMARY
2.6 CONCEPTS AND KNOWLEDGE
REFERENCES
EXERCISES

3.1 INTRODUCTION
3.2 ELECTRICAL CONSIDERATIONS

3.2.1 Transmission Lines. 3.2.2 Signal Reflections. 3.2.3 Bus Terminations

3.3 DATA TRANSFER SYNCHRONIZATION

3.3.1 Synchronous Buses. 3.3.2 Asynchronous Buses

3.4 PARALLEL AND SERIAL BUSES
3.5 BUS ARBITRATION

3.5.1 Centralized Bus Arbitration. 3.5.2 Decentralized Bus Arbitration

3.6 LOCAL BUSES
3.7 PCI BUS

3.7.1 PCI Bus Overview. 3.7.2 PCI Bus Operation: PCI Bus Features; PCI Bus Arbitration; PCI Bus Transactions; PCI Bus Interrupts. 3.7.3 PCI-X Bus

3.8 PCI EXPRESS BUS

3.8.1 PCI Express Bus Overview. 3.8.2 PCI Express Bus Architecture: PCI Express Bus Link; PCI Express Bus Topology; PCI Express Bus Architecture Layers; PCI Express Bus Transactions; PCI Express Bus Interrupts. 3.8.3 Versions of the PCI Express Bus Standard

3.9 I²C BUS

3.9.1 I²C Bus Overview. 3.9.2 Data Transfers. 3.9.3 I²C Bus Arbitration. 3.9.4 I²C Bus Versions

3.10 SPI BUS

3.10.1 SPI Bus Overview. 3.10.2 SPI Bus Signals. 3.10.3 Data Transfers. 3.10.4 Clock Polarity and Phase. 3.10.5 Comparison to I²C Bus

3.11 UNIVERSAL SERIAL BUS

3.11.1 Universal Serial Bus Overview. 3.11.2 Universal Serial Bus Topology. 3.11.3 Universal Serial Bus Versions. 3.11.4 Cables and Connectors. 3.11.5 Universal Serial Bus Transfer Types

3.12 VME BUS

3.12.1 VME Bus Overview. 3.12.2 Parallel VME Bus Variants: Original VME Bus; VME64 Bus; VME64x Bus; VME320 Bus. 3.12.3 VXS Bus. 3.12.4 VPX Bus

3.13 CHAPTER SUMMARY
3.14 CONCEPTS AND KNOWLEDGE
REFERENCES
EXERCISES

4.1 REQUIREMENTS FOR EMBEDDED SYSTEMS
4.2 EXPANSION MODULES BASED ON THE VME BUS

4.2.1 VME Modules. 4.2.2 VXS Modules. 4.2.3 VPX Modules. 4.2.4 OpenVPX

4.3 COMPACTPCI MODULES

4.3.1 CompactPCI Overview. 4.3.2 CompactPCI Extensions: Hot Swap; Computer Telephony; Ethernet Connectivity; PCI eXtensions for Instrumentation; CompactPCI Express; CompactPCI PlusIO; CompactPCI Serial

4.4 MEZZANINE MODULES

4.4.1 Introduction. 4.4.2 Previous Mezzanine Modules. 4.4.3 Switched Mezzanine Card. 4.4.4 FPGA Mezzanine Card

4.5 COM EXPRESS MODULES

4.5.1 COM Express Overview. 4.5.2 Type 10 COM Express Modules. 4.5.3 Type 6 COM Express Modules. 4.5.4 Type 7 COM Express Modules

4.6 CHAPTER SUMMARY
4.7 CONCEPTS AND KNOWLEDGE
REFERENCES
EXERCISES

5.1 CATHODE RAY TUBE DISPLAYS
5.2 LIQUID CRYSTAL DISPLAYS

5.2.1 Liquid Crystals. 5.2.2 Twisted Nematic Technology: Principle of Operation; Twisted Nematic Liquid Crystal Display Structure; Improved Twisted Nematic Technologies. 5.2.3 Addressing Techniques: Direct and Multiplexed Addressing; Passive-Matrix Displays; Active-Matrix Displays; Defective Pixels. 5.2.4 Backlighting Types. 5.2.5 Liquid Crystal Display Parameters: Response Time; Contrast Ratio; Color Depth; Color Gamut; Viewing Angle. 5.2.6 Vertical Alignment Technology: Principle of Vertical Alignment Technology; Multi-Domain Vertical Alignment Technology; Advanced Multi-Domain Vertical Alignment Technology; Patterned Vertical Alignment Technology. 5.2.7 In-Plane Switching Technology: Principle of In-Plane Switching Technology; Super In-Plane Switching Technology; Horizontal In-Plane Switching Technology; Advanced High-Performance In-Plane Switching Technology; Plane to Line Switching Technology.

5.3 PLASMA DISPLAY PANELS
5.4 FIELD EMISSION DISPLAYS
5.5 ORGANIC LIGHT EMITTING DIODE DISPLAYS

5.5.1 Organic Light Emitting Diodes. 5.5.2 Organic Light Emitting Diode Types: Small-Molecule and Polymer Organic Light Emitting Diodes; Fluorescent and Phosphorescent Organic Light Emitting Diodes. 5.5.3 Organic Light Emitting Diode Structure and Operation. 5.5.4 Organic Light Emitting Diode Display Structure. 5.5.5 Passive-Matrix Organic Light Emitting Diode Displays. 5.5.6 Active-Matrix Organic Light Emitting Diode Displays. 5.5.7 Color Generation Techniques. 5.5.8 Manufacturing Technologies: Vacuum Thermal Evaporation; Organic Vapor Phase Deposition; Color Patterning with Shadow Masks; Laser-Based Color Patterning; Spin Coating; Inkjet Printing; Organic Vapor Jet Printing. 5.5.9 Transparent Organic Light Emitting Diode Displays. 5.5.10 Flexible Organic Light Emitting Diode Displays. 5.5.11 Sub-Pixel Layouts for Organic Light Emitting Diode Displays. 5.5.12 Advantages and Disadvantages of OLED Displays

5.6 ELECTRONIC PAPER DISPLAYS

5.6.1 Introduction. 5.6.2 Electronic Paper Display Technologies: Electrophoretic Technology; Electrowetting Technology; Interferometric Modulator Technology. 5.6.3 Color Technologies: Color Electrophoretic Technologies; Color Electrowetting Technologies; Color Interferometric Modulator Technology. 5.6.4 Applications of Electronic Paper Displays

5.7 QUANTUM DOT DISPLAYS

5.7.1 Quantum Dots. 5.7.2 Quantum Dot Technologies Used in LCD Panels. 5.7.3 Quantum Dot on OLED Technology. 5.7.4 Quantum Dot on MicroLED Technology. 5.7.5 Quantum Dot Electro-Luminescent Technology

5.8 CHAPTER SUMMARY
5.9 CONCEPTS AND KNOWLEDGE
REFERENCES
EXERCISES

6.1 STRUCTURE OF A GRAPHICS ADAPTER
6.2 GRAPHICS MEMORY

6.2.1 Types of Graphics Memories. 6.2.2 Graphics Double Data Rate 6 Memory. 6.2.3 High Bandwidth Memory

6.3 GRAPHICS PIPELINE

6.3.1 Application Stage. 6.3.2 Geometry Processing Stage: Model Transform; View Transform; Lighting; Projection; Clipping; Screen Mapping; Optional Geometry Processing Stages. 6.3.3 Rasterization Stage: Triangle Setup; Triangle Traversal. 6.3.4 Pixel Processing Stage: Pixel Shading; Output Merging

6.4 GRAPHICS PROCESSING UNIT

6.4.1 Overview. 6.4.2 Graphics Library Specifications: Microsoft DirectX; Open Graphics Library; Vulkan. 6.4.3 The 2D Graphics Engine. 6.4.4 The 3D Graphics Engine: Graphics Processing Unit Pipeline; Data-Parallel Architecture; Unified Shader Architecture; Memory Architecture. 6.4.5 General-Purpose Computing on Graphics Processing Units: Overview; Compute Unified Device Architecture; Open Computing Language. 6.4.6 NVIDIA Turing TU102 GPU: Overview; Streaming Multiprocessor; GPU Chip Organization; Tensor Cores; Ray Tracing Cores. 6.4.7 Intel Gen11 Processor Graphics: Overview; Intel System-on-Chip Architecture; Intel Gen11 Processor Graphics Architecture; Subslice Architecture

6.5 DISPLAY INTERFACE

6.5.1 High-Definition Multimedia Interface: Overview; TMDS Link and Data Encoding; Display Data Channel; Consumer Electronics Control; HDMI Ethernet and Audio Return Channel; Video Formats; Audio Formats; HDMI Versions; Connectors and Cables. 6.5.2 DisplayPort Interface: Overview; Main Link; Auxiliary Channel; DisplayPort Versions; Dual-Mode DisplayPort; Connectors and Cables; Embedded DisplayPort

6.6 CHAPTER SUMMARY
6.7 CONCEPTS AND KNOWLEDGE
REFERENCES
EXERCISES

7.1 OPTICAL DISC CLASSIFICATION
7.2 COMPACT DISC

7.2.1 Short History of Compact Disc. 7.2.2 Compact Disc Physical Medium. 7.2.3 Compact Disc Data Organization and Encoding: Data Recording and Encoding; First Level of Error Correction; Sector Format; Second Level of Error Correction; Sub-Channels; Compact Disc Organization. 7.2.4 Optical Read Assembly. 7.2.5 Compact Disc Types: Compact Disc-Digital Audio; Compact Disc-Digital Audio Variants; Compact Disc Digital Video; Compact Disc Super Video; Super Audio Compact Disc; Compact Disc-Recordable; Compact Disc-Read/Write

7.3 DVD

7.3.1 Overview. 7.3.2 DVD-Video. 7.3.3 DVD-Read/Only Memory. 7.3.4 DVD-Recordable. 7.3.5 DVD+Recordable. 7.3.6 DVD-Read/Write. 7.3.7 DVD+ReWritable

7.4 BLU-RAY DISC

7.4.1 Overview. 7.4.2 Blu-ray Disc Physical Format: Optical Aberrations and Tolerances; Modulation and Error Correction; Groove System; Dual-Layer Discs. 7.4.3 Blu-ray Disc Recordable and Rewritable: Single-Layer and Dual-Layer Physical Formats; Triple-Layer and Quadruple-Layer Physical Formats; Audio Visual Logical Formats. 7.4.4 Blu-ray Disc-Read/Only Memory: Blu-ray Disc-Read/Only Memory Physical Format; Ultra HD Blu-ray Physical Format; Audio Visual Logical Format

7.5 CHAPTER SUMMARY
7.6 CONCEPTS AND KNOWLEDGE
REFERENCES
EXERCISES