Associate Professor dr. eng. Octavian Creţ

DIGITAL SYSTEMS DESIGN

1^st year of study, Computer Science and Information Technology sections, teaching in Romanian and in English, 2^nd semester

STRUCTURE

2 hrs courses / week

2 hrs laboratory / week

GRADES

Total AMP exam points: 100, representing grade 10

60 points - exam (E)

20 points - VHDL test (V)

20 points - project (P)

Grade computing formula: G = (E + V + P) / 10; G is rounded up to the nearest integer

Pass conditions: existence of V and existence of P and W ³ 27 and V ³ 9 and P ³ 9

1. SYLLABUS

2. LABORATORY

3. PROJECTS

SYLLABUS (Top)

Course goals: Acquisition and practice of Automata (Finite State Machines) Design. Acquisition and practice of Microprogramming Design Methods.

Keywords: Finite State Machines (Finite Automata); Asynchronous Automata; Synchronous Automata; Linear Automata; Microprogramming

References

1. Contemporary Logic Design, Randy H. Katz, Benjamin Cunnings/Addison Wesley Publishing Co., 2005

2. Digital Design Principles and Practices, John F. Wakerly, Prentice-Hall, 2000

3. Logic Design, Peter A. Maurer, University of South Florida, USA

4. Digital Logic and Microprocessor Design with VHDL, Enoch Hwang

5. Circuite integrate digitale, Gh. Stefan, V. Bistriceanu, Probleme, proiectare, Ed. Albastră, 2000

6. Proiectarea sistemelor numerice folosind tehnologia FPGA, S. Nedevschi, Z. Baruch, O. Creţ, Ed. Mediamira, Cluj-Napoca, 1999

7. Sisteme de calcul reconfigurabile, O. Creţ, Ed. U.T. Press, Cluj-Napoca, 2005

8. Systèmes numériques câblés et microprogrammés, André Stauffer, 1989, Presses polytechniques romandes, Lausanne, Suisse

9. Automate programabile, Th. Borangiu, R. Dobrescu, Ed. Academiei, 1986

10. Microprocesoare, C. Lupu, V. Ţepelea, E. Purice, Ed. militară, 1982

11. Limbajul VHDL, Îndrumător de laborator, O. Creţ, L. Văcariu, A. Neţin, Ed. U.T. Press, Cluj-Napoca, 2002

12. Limbajul VHDL, Îndrumător de laborator, O. Creţ, L. Văcariu, Aurel Neţin, Ediţia a 2-a, Ed. U.T. Press, Cluj-Napoca, 2005

Aims	Understand the theory of Automata. Apply synchronous and asynchronous Automata design principles and descriptive techniques. Understand the Microprogramming paradigm and become able to apply it in design of digital systems. Utilize the VHDL Hardware Description Language in the design of complex digital systems.
Learning Outcomes	Knowledge / understanding	Learn the VHDL Hardware Description Language. Learn and understand the methodology for designing digital systems using microprogramming. Learn and understand the wired methodology for designing digital systems. Learn and understand the methods for designing synchronous and asynchronous Automata. Learn and understand the methods for Automata identification and for determining if an Automaton is a lossless machine. Learn and understand the basic elements of linear Automata.
	Theoretical Skills	Identify the most appropriate type of Automaton to be used in any design process and implement it. Realize an optimal state encoding. Perform a complete analysis and identification of any given Automaton. Deduce significant properties of the used Automata.
	Practical Skills	Implement, simulate and test in VHDL any digital system. Design and implement any microprogrammed digital system. Design and implement synchronous and asynchronous Automata. Identify finite Automata (Finite State Machines – FSMs). Determine if an Automaton is a lossless machine. Design and use linear Automata in various application fields. Evaluate, justify and optimize the chosen design solutions.

COURSE DESCRIPTION (Top)

The VHDL hardware description language – basic design units, signals.

The VHDL hardware description language – generics, constants, operators, data types, attributes

The VHDL hardware description language – sequential domain

The VHDL hardware description language – concurrent domain

Creating test benches for simulating and testing circuits in VHDL

Automata theory – classification, definitions, formal models

Microprogramming, Microprogrammed devices

Design of microprogrammed synchronous Automata

Asynchronous Automata analysis and design (synthesis) (I)

Asynchronous Automata analysis and design (synthesis) (II)

Automata identification

Lossless machines

Linear Automata

LABORATORY (Top)

Workbook: Octavian Creţ, Lucia Văcariu, Aurel Neţin. “Limbajul VHDL. Îndrumător de laborator”. Ediţia a doua completată şi revizuită. U.T. Pres Publishing House, Cluj-Napoca, ROMÂNIA, 2005, ISBN 973-662-145-6, 227 pages. (available only in Romanian).

L1: Introduction to VHDL;

L2: Design Units;

L3: Signals. Generics. Constants;

L4: Operators. Data types;

L5: Attributes;

L6: Sequential Domain. Processes;

L7: Sequential Instructions;

L8: Concurrent Domain;

L9: Concurrent Instructions;

L10: Subprograms;

L11: Testbenches;

L12: Standard and Predefined Packages.

VHDL Test

Recovery of Missed Laboratories (only attested emergency cases)

IMPORTANT!

1. The presence at the laboratory work is mandatory!!!

2. Recoveries of maximum 2 lab works (L) are admitted on the first week of the exams session (tax will be charged).

3. VHDL Projects represent 20 points of the AMP exam grade.

PROJECTS (Top)

1. Block schematic design and modules assignment to the members of a project group (team);

2. Divider unit delivery;

3. Detailed schematic analysis;

4. Projects and documentation delivery.

IMPORTANT!

1. The presence at ALL Project classes is mandatory!

2. At most ONE project recovery class is admitted on the first week of the session (tax will be charged).

3. The Project Activity represents 20 points of the total AMP grade as follows:

- 20 points – Project;

- YES / NO - Divider Unit (presented at the Seminar) – delivery is mandatory for the presence at the exam.

4. Total Project points = 20 points:

8 points Documentation, with:

- specification;

- design stages;

- components and netlist;

- notations legend and external interface;

- justification for the chosen solution;

- usage and maintenance instructions;

- upgrade possibilities.

12 points for correct (working) solution

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