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J Drive™ Engine

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Success
Stories

Desktop
Programmer & Download Cable Support

J
Drive Engine

Automatic
Test Equipment (ATE)

ISP
Standards & Specifications

Third-Party
Tools

Configuration
Storage Devices

Xilinx has developed and introduced the world's first
>IEEE
Std 1532 Programming Engine: J Drive Engine.
Using this new engine and a simple cable connected to the
parallel port of any PC, (See: J
Drive Engine Components) users can now easily configure
Xilinx IEEE Std 1532 compatible PLDs. The designer provides
J Drive Engine with the Data and 1532 BSDL files
for the device(s) to be programmed using a command line
interface to configure the PLDs in the JTAG chain.

J Drive Engine as an Enabling Technology:

Boundary Scan Tool makers, Automatic Test Equipment (ATE)
suppliers and Device Programmer manufacturers can use JDrive
Engine as a basis to quickly develop their own solutions for
their platforms.

See what Xilinx Boundary
Scan Partners are saying about J Drive.

J Drive ANSI C code can also be compiled code
for an embedded processor.

J Drive Engine
Components:

J Drive Engine requires two IEEE Std 1532
files to operate: The algorithm description framework (1532
BSDL File), and the configuration data file (.isc). The IEEE
Standard 1532 is a formal extension to the IEEE Standard
1149.1b-1994 (JTAG) for programmable logic devices. All
devices in the chain must be IEEE Std 1149 compatible since
the same test access port (TAP) is used. Devices not IEEE Std
1532 compatible should be placed in bypass mode using the
BYPASS option in the J Drive command file.

The hardware connections required to use the J
Drive Engine are:

Connect a Xilinx parallel cable to the printer port of
any Windows PC

Connect the other end of the Xilinx Parallel cable (TCK,
TDO, TDI, and TMS) to the chain of IEEE Std 1532 compatible
PLDs on the board to be programmed

Using J Drive Engine is simple:

Download the engine and the XGEN file converter from
the
J
Drive Engine download site.

Download the 1532 BSDL file(s) for the device(s) in the
chain from the 1532 BSDL
site.

Convert the appropriate Xilinx data file format FPGA
(.bit), CPLD (.jed) and ISPROM (.mcs) (whichever are
applicable) to the 1532 Data File (.isc) using the XGEN
converter.

Write the command file to describe the devices in the
scan chain and the actions (id code check, erase, program,
verify).

Run J Drive Engine using command file.

Please address any comments on the J Drive Engine to [email-masked].

Data Sheets and
Application Notes

Download J Drive
Engine

Download 1532 BSDL
files

J Drive: In-System
Programming of IEEE Standard 1532 Devices (XAPP500)

Partner
Testimonials

IEEE
Std 1532

ISP
Standards and
Specifications

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