lab22 Project Status (10/18/2023 - 14:58:53)
Project File:	lab2.xise	Parser Errors:	No Errors
Module Name:	lab22	Implementation State:	Synthesized
Target Device:	xc3s500e-4fg320	Errors:
Product Version:	ISE 14.7	Warnings:
Design Goal:	Balanced	Routing Results:
Design Strategy:	Xilinx Default (unlocked)	Timing Constraints:
Environment:	System Settings	Final Timing Score:

 

Detailed Reports						[-]
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report	Current	Wed Oct 18 14:57:36 2023
Translation Report
Map Report
Place and Route Report
Power Report
Post-PAR Static Timing Report
Bitgen Report

 

Secondary Reports			[-]
Report Name	Status	Generated

Date Generated: 10/18/2023 - 14:58:53